Fields with axi behavior map the bus accesses supported by them to a different AXI4L bus.

The width of the outgoing AXI4L bus is set to the width of the field, which must therefore be 32 or 64 bits. The word address for the outgoing bus is taken from the subaddress; the 2 or 3 LSBs of the address (depending on the bus width) are always zero. For example, a field with address 0x0--- in a 32-bit system has a 10-bit subaddress, therefore allowing access to 4kiB of address space on the child AXI4L port.

Note that going from a 64-bit bus to a 32-bit bus always "stretches" the address space of the 32-bit bus, since only half the bus width can be utilized. While it would technically be possible to avoid this by just doing two transfers on the slave bus for each AXI field access, this adds a bunch of complexity, ambiguity, and may prevent read-volatile fields on the child bus from being accessed without side effects, so this feature was not implemented. Going from a 32-bit bus to a 64-bit bus on the other hand is perfectly fine, since this just makes the logical register for the AXI field wider than the bus, following vhdmmio's normal rules. Just make sure that bit 2 of the field's address is zero.

axi fields support multiple outstanding requests. The amount of outstanding requests supported is controlled centrally in the register file features structure.

This structure supports the following configuration keys.

This key configures the supported bus access modes.

The following values are supported:

• read-write (default): both read and write accesses are supported.

• read-only: only read accesses are supported.

• write-only: only write accesses are supported.

This key is optional unless required by context. If not specified, the default value (read-write) is used.

This key configures driving an internal signal high when the vhdmmio-specific interrupt signal associated with the outgoing AXI4L stream is asserted. This internal signal can then be tied to an internal interrupt to propagate the flag.

The following values are supported:

• null (default): the feature is disabled.

• a string matching [a-zA-Z][a-zA-Z0-9_]*: an internal signal with the given name is created (if necessary) and driven by the incoming interrupt signal.

This key is optional unless required by context. If not specified, the default value (null) is used.

This key specifies whether records or flattened signals are desired for the bus interface. Note that flatten (defined here) should also be set to yes to make this work.

The following values are supported:

• no (default): the bus is not flattened; the records from vhdmmio_pkg.vhd are used.

• yes: the bus is flattened; the standard AXI4-lite signal names are used.

This key is optional unless required by context. If not specified, the default value (no) is used.