Fletchgen
The Fletcher Design Generator
Public Member Functions | Static Public Member Functions | Public Attributes | List of all members
fletchgen::Options Struct Reference

Fletcher program options. More...

#include <options.h>

Public Member Functions

bool MustGenerateDesign () const
 Return true if a design must be generated.
 
bool MustGenerateSREC () const
 Return true if an SREC file must be generated.
 
bool MustGenerate (const std::string &target) const
 Return true if generation must take place for some target.
 
bool LoadRecordBatches ()
 Load all specified RecordBatches. Returns true if successful, false otherwise.
 
bool LoadSchemas ()
 Load all specified Schemas. Returns true if successful, false otherwise.
 
std::string ToString () const
 Return human-readable options.
 

Static Public Member Functions

static bool Parse (Options *options, int argc, char **argv)
 Parse command line options and store the result. More...
 

Public Attributes

std::vector< std::string > schema_paths
 Paths to the schema files.
 
std::vector< std::shared_ptr< arrow::Schema > > schemas
 Loaded schemas.
 
std::vector< std::string > recordbatch_paths
 Paths to RecordBatches.
 
std::vector< std::shared_ptr< arrow::RecordBatch > > recordbatches
 Loaded RecordBatches.
 
std::string output_dir = "."
 Output directory.
 
std::vector< std::string > languages = {"vhdl", "dot"}
 Output languages.
 
std::string srec_out_path
 SREC output path. This is the path where an SREC file based on input RecordBatches will be placed.
 
std::string srec_sim_dump
 SREC simulation output path, where the simulation should dump the memory contents of written RecordBatches.
 
std::string kernel_name = "Kernel"
 Name of the Kernel.
 
std::vector< std::string > regs
 Custom 32-bit registers.
 
std::string externals_yaml
 File to parse for external signals to/from top level to kernel.
 
std::vector< std::string > bus_dims = {"64,512,8,1,16"}
 Bus dimensions strings.
 
bool mmio64 = false
 Use 64-bits data width for AXI4-lite MMIO bus when true.
 
size_t mmio_addr_width = 32
 AXI4-lite address bus width.
 
size_t mmio_offset = 0
 AXI4-lite offset address for Fletcher registers.
 
bool axi_top = false
 Whether to generate an AXI top level.
 
bool sim_top = false
 Whether to simulate an AXI top level.
 
bool static_vhdl = false
 Whether to generate static VHDL files (copied from hardware directory, embedded as resources).
 
bool backup = false
 Whether to backup any existing generated files.
 
bool vivado_hls = false
 Vivado HLS template. TODO(johanpel): not yet implemented.
 
bool quit = false
 Whether to quit the program without doing anything (useful for just showing help or version).
 
bool quiet = false
 Make the output quiet. TODO(johanpel): not yet implemented.
 
bool verbose = false
 Make the output verbose. TODO(johanpel): not yet implemented.
 
bool version = false
 Show version information.
 

Detailed Description

Fletcher program options.

Definition at line 26 of file options.h.

Member Function Documentation

◆ Parse()

bool fletchgen::Options::Parse ( Options options,
int  argc,
char **  argv 
)
static

Parse command line options and store the result.

Parameters
optionsA pointer to the Options object to parse into
argcArgument count
argvArgument values
Returns
True if successful, false otherwise.

Definition at line 22 of file options.cc.


The documentation for this struct was generated from the following files: