Fletchgen
The Fletcher Design Generator
options.h
1 // Copyright 2018-2019 Delft University of Technology
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 // http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14 
15 #pragma once
16 
17 #include <arrow/api.h>
18 
19 #include <vector>
20 #include <memory>
21 #include <string>
22 
23 namespace fletchgen {
24 
26 struct Options {
28  std::vector<std::string> schema_paths;
30  std::vector<std::shared_ptr<arrow::Schema>> schemas;
32  std::vector<std::string> recordbatch_paths;
34  std::vector<std::shared_ptr<arrow::RecordBatch>> recordbatches;
36  std::string output_dir = ".";
38  std::vector<std::string> languages = {"vhdl", "dot"};
40  std::string srec_out_path;
42  std::string srec_sim_dump;
44  std::string kernel_name = "Kernel";
46  std::vector<std::string> regs;
48  std::string externals_yaml;
50  std::vector<std::string> bus_dims = {"64,512,8,1,16"};
52  bool mmio64 = false;
54  size_t mmio_addr_width = 32;
56  size_t mmio_offset = 0;
57 
59  bool axi_top = false;
61  bool sim_top = false;
63  bool static_vhdl = false;
65  bool backup = false;
66 
68  bool vivado_hls = false;
69 
71  bool quit = false;
72 
74  bool quiet = false;
76  bool verbose = false;
77 
79  bool version = false;
80 
88  static bool Parse(Options *options, int argc, char **argv);
89 
90  // Option checkers:
91 
93  [[nodiscard]] bool MustGenerateDesign() const;
95  [[nodiscard]] bool MustGenerateSREC() const;
97  [[nodiscard]] bool MustGenerate(const std::string &target) const;
98 
100  [[nodiscard]] bool LoadRecordBatches();
102  [[nodiscard]] bool LoadSchemas();
103 
105  [[nodiscard]] std::string ToString() const;
106 };
107 
108 } // namespace fletchgen
Contains all classes and functions related to Fletchgen.
Definition: array.cc:29
Fletcher program options.
Definition: options.h:26
bool quit
Whether to quit the program without doing anything (useful for just showing help or version).
Definition: options.h:71
std::string output_dir
Output directory.
Definition: options.h:36
bool LoadSchemas()
Load all specified Schemas. Returns true if successful, false otherwise.
Definition: options.cc:170
std::vector< std::shared_ptr< arrow::Schema > > schemas
Loaded schemas.
Definition: options.h:30
bool MustGenerateDesign() const
Return true if a design must be generated.
Definition: options.cc:154
bool LoadRecordBatches()
Load all specified RecordBatches. Returns true if successful, false otherwise.
Definition: options.cc:158
std::vector< std::string > languages
Output languages.
Definition: options.h:38
bool axi_top
Whether to generate an AXI top level.
Definition: options.h:59
bool MustGenerateSREC() const
Return true if an SREC file must be generated.
Definition: options.cc:130
std::vector< std::string > recordbatch_paths
Paths to RecordBatches.
Definition: options.h:32
std::string srec_out_path
SREC output path. This is the path where an SREC file based on input RecordBatches will be placed.
Definition: options.h:40
bool mmio64
Use 64-bits data width for AXI4-lite MMIO bus when true.
Definition: options.h:52
bool backup
Whether to backup any existing generated files.
Definition: options.h:65
bool static_vhdl
Whether to generate static VHDL files (copied from hardware directory, embedded as resources).
Definition: options.h:63
bool version
Show version information.
Definition: options.h:79
static bool Parse(Options *options, int argc, char **argv)
Parse command line options and store the result.
Definition: options.cc:22
std::vector< std::string > schema_paths
Paths to the schema files.
Definition: options.h:28
std::vector< std::string > bus_dims
Bus dimensions strings.
Definition: options.h:50
bool quiet
Make the output quiet. TODO(johanpel): not yet implemented.
Definition: options.h:74
size_t mmio_addr_width
AXI4-lite address bus width.
Definition: options.h:54
std::string srec_sim_dump
SREC simulation output path, where the simulation should dump the memory contents of written RecordBa...
Definition: options.h:42
bool sim_top
Whether to simulate an AXI top level.
Definition: options.h:61
bool MustGenerate(const std::string &target) const
Return true if generation must take place for some target.
Definition: options.cc:150
std::string externals_yaml
File to parse for external signals to/from top level to kernel.
Definition: options.h:48
std::vector< std::string > regs
Custom 32-bit registers.
Definition: options.h:46
std::vector< std::shared_ptr< arrow::RecordBatch > > recordbatches
Loaded RecordBatches.
Definition: options.h:34
bool verbose
Make the output verbose. TODO(johanpel): not yet implemented.
Definition: options.h:76
size_t mmio_offset
AXI4-lite offset address for Fletcher registers.
Definition: options.h:56
std::string ToString() const
Return human-readable options.
Definition: options.cc:182
bool vivado_hls
Vivado HLS template. TODO(johanpel): not yet implemented.
Definition: options.h:68
std::string kernel_name
Name of the Kernel.
Definition: options.h:44