Cerata
A library to generate structural hardware designs
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Contains everything related to the VHDL back-end. More...
Classes | |
struct | Arch |
Architecture generators. More... | |
struct | Block |
A block of code. More... | |
struct | Decl |
Declaration generators. More... | |
struct | Design |
A VHDL design that can generate code for a single file. More... | |
class | Identifier |
A VHDL Identifier convenience structure. More... | |
struct | Inst |
Functions to generate VHDL instantiation code. More... | |
struct | Line |
A line of code. More... | |
struct | MultiBlock |
A structure to hold multiple blocks. More... | |
struct | Range |
A VHDL range. More... | |
struct | Resolve |
Functions to resolve VHDL-specific problems with graphs. More... | |
class | Template |
Class to hold and modify a VHDL template file. More... | |
struct | trloc |
Structure to hold a template replacement string location. More... | |
class | VHDLOutputGenerator |
VHDL Output Generator. More... | |
Functions | |
Line & | operator<< (Line &lhs, const std::string &str) |
Append a part to a line. | |
Line & | operator<< (Line &lhs, const Line &rhs) |
Append all parts of a line to another line. | |
Line & | operator+= (Line &lhs, const std::string &str) |
Append a string to the last line part. | |
Block & | operator<< (Block &lhs, const Line &line) |
Append a line to a block. | |
Block & | operator<< (Block &lhs, const Block &rhs) |
Append the lines of a block to another block. | |
Block & | Prepend (const std::string &lhs, Block *rhs, const std::string &sep="_") |
Prepend a string to every line of a block. | |
Block & | operator<< (Block &lhs, const std::string &rhs) |
Append a string to the last parts of all lines in a block. | |
Block & | operator<<= (Block &lhs, const std::string &rhs) |
Append a string to the last parts of all lines in a block, except the last one. | |
MultiBlock & | operator<< (MultiBlock &lhs, const Block &rhs) |
Append a block to a multiblock. | |
MultiBlock & | operator<< (MultiBlock &lhs, const Line &rhs) |
Append a line to a multiblock. | |
MultiBlock & | operator<< (MultiBlock &lhs, const MultiBlock &rhs) |
Append a multiblock to a multiblock. | |
std::string | ToString (const std::vector< Block > &blocks) |
Return a vector of blocks as a single string. | |
std::shared_ptr< Type > | valid () |
A stream ready-valid handshake "valid" signal. | |
std::shared_ptr< Type > | ready () |
A stream ready-valid handshake "ready" signal. | |
std::string | ToString (Port::Dir dir) |
Return a VHDL version of a terminator direction. | |
Port::Dir | Reverse (Port::Dir dir) |
Reverse a terminator direction. | |
std::vector< FlatType > | FilterForVHDL (const std::vector< FlatType > &list) |
Filter abstract types from a list of flattened types. More... | |
std::shared_ptr< Node > | GetWidth (const std::shared_ptr< Type > &type) |
Obtain the width of a primitive, synthesizable type. If it is not primitive, returns a Literal 0 node. | |
std::string | ToString (Term::Dir dir) |
Return a VHDL version of a terminator direction. | |
Term::Dir | Reverse (Term::Dir dir) |
Reverse a terminator direction. | |
Variables | |
constexpr char | DEFAULT_SUBDIR [] = "vhdl" |
Default subdirectory for output generation. | |
constexpr char | DEFAULT_LIBS [] |
Default libraries to include. More... | |
Contains everything related to the VHDL back-end.
Filter abstract types from a list of flattened types.
list | The list to filter |
Definition at line 53 of file vhdl_types.cc.
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constexpr |
Default libraries to include.
Definition at line 23 of file defaults.h.