Cerata
A library to generate structural hardware designs
|
VHDL Output Generator. More...
#include <vhdl.h>
Public Member Functions | |
VHDLOutputGenerator (std::string root_dir, std::vector< OutputSpec > outputs={}, std::string notice="") | |
Construct a new VHDLOutputGenerator. | |
void | Generate () override |
Generate the output. | |
std::string | subdir () override |
Return that the VHDLOutputGenerator will place the files in. | |
![]() | |
OutputGenerator (std::string root_dir, std::vector< OutputSpec > outputs={}) | |
Construct an OutputGenerator. | |
OutputGenerator & | AddOutput (const OutputSpec &output) |
Add a graph to the list of graphs to generate output for. | |
Public Attributes | |
std::string | notice_ |
Copyright notice to place on top of a file. | |
Additional Inherited Members | |
![]() | |
std::string | root_dir_ |
The root directory to generate the output in. | |
std::vector< OutputSpec > | outputs_ |
A list of things to put out. | |