Cerata
A library to generate structural hardware designs
cerata::vhdl::VHDLOutputGenerator Class Reference

VHDL Output Generator. More...

#include <vhdl.h>

+ Inheritance diagram for cerata::vhdl::VHDLOutputGenerator:
+ Collaboration diagram for cerata::vhdl::VHDLOutputGenerator:

Public Member Functions

 VHDLOutputGenerator (std::string root_dir, std::vector< OutputSpec > outputs={}, std::string notice="")
 Construct a new VHDLOutputGenerator.
 
void Generate () override
 Generate the output.
 
std::string subdir () override
 Return that the VHDLOutputGenerator will place the files in.
 
- Public Member Functions inherited from cerata::OutputGenerator
 OutputGenerator (std::string root_dir, std::vector< OutputSpec > outputs={})
 Construct an OutputGenerator.
 
OutputGeneratorAddOutput (const OutputSpec &output)
 Add a graph to the list of graphs to generate output for.
 

Public Attributes

std::string notice_
 Copyright notice to place on top of a file.
 

Additional Inherited Members

- Protected Attributes inherited from cerata::OutputGenerator
std::string root_dir_
 The root directory to generate the output in.
 
std::vector< OutputSpecoutputs_
 A list of things to put out.
 

Detailed Description

VHDL Output Generator.

Definition at line 59 of file vhdl.h.


The documentation for this class was generated from the following files: