17 #include <fletcher/arrow-utils.h>
18 #include <cerata/api.h>
23 #include <unordered_map>
25 #include "fletchgen/axi4_lite.h"
29 using cerata::Component;
30 using cerata::Instance;
32 using cerata::Literal;
34 using cerata::Parameter;
35 using cerata::PortArray;
36 using cerata::integer;
38 using cerata::ClockDomain;
78 std::optional<uint32_t>
addr = std::nullopt,
79 std::optional<uint64_t>
init = std::nullopt)
94 std::optional<uint32_t>
addr = std::nullopt;
95 std::optional<uint64_t>
init = std::nullopt;
96 std::unordered_map<std::string, std::string>
meta;
110 const std::shared_ptr<ClockDomain> &domain = cerata::default_domain());
114 std::shared_ptr<Object>
Copy()
const override;
119 const std::shared_ptr<ClockDomain> &domain = cerata::default_domain());
132 std::optional<size_t *> next_addr = std::nullopt);
145 std::shared_ptr<Component>
mmio(
const std::vector<fletcher::RecordBatchDescription> &batches,
146 const std::vector<MmioReg> ®s,
Contains all classes and functions related to Fletchgen.
std::shared_ptr< MmioPort > mmio_port(Port::Dir dir, const MmioReg ®, const std::shared_ptr< ClockDomain > &domain)
Create an mmio port.
constexpr char MMIO_BATCH[]
Fletchgen metadata for mmio-controlled buffer address ports.
constexpr char MMIO_DEFAULT[]
Fletchgen metadata for mmio-controlled buffer address ports.
constexpr char MMIO_PROFILE[]
Fletchgen metadata for mmio-controlled profiling ports.
MmioBehavior
Register access behavior enumeration.
@ STATUS
Register contents is controlled by hardware kernel.
@ CONTROL
Register contents is controlled by host software.
@ STROBE
Register contents is asserted for one cycle by host software.
constexpr char MMIO_KERNEL[]
Fletchgen metadata for mmio-controlled kernel ports.
MmioFunction
Register intended use enumeration.
@ BUFFER
Registers for buffer addresses.
@ KERNEL
Registers for the kernel.
@ BATCH
Registers for RecordBatch metadata.
@ PROFILE
Register for the profiler.
@ DEFAULT
Default registers.
constexpr char MMIO_BUFFER[]
Fletchgen metadata for mmio-controlled buffer address ports.
bool ExposeToKernel(MmioFunction fun)
Return true if an mmio register's function must cause it to be exposed to the user kernel.
std::string GenerateVhdmmioYaml(const std::vector< std::vector< MmioReg > * > ®s, Axi4LiteSpec axi_spec, std::optional< size_t * > next_addr)
Returns a YAML string for the vhdmmio tool based on a set of registers.
std::shared_ptr< Component > mmio(const std::vector< fletcher::RecordBatchDescription > &batches, const std::vector< MmioReg > ®s, Axi4LiteSpec axi_spec)
Generate the MMIO component for the nucleus.
AXI4-lite bus specification.
A port on the vhdmmio component. Remembers what register spec it came from.
std::shared_ptr< Object > Copy() const override
Make a copy of this MmioPort.
MmioReg reg
The Mmio register this port will represent.
MmioPort(const std::string &name, Port::Dir dir, const MmioReg ®, const std::shared_ptr< ClockDomain > &domain=cerata::default_domain())
MmioPort constructor.
Structure to represent an MMIO register.
std::optional< uint64_t > init
Optional initial value.
std::string desc
Register description.
MmioBehavior behavior
Register access behavior.
uint32_t index
LSB start index at that address.
MmioFunction function
Register intended use.
MmioReg()=default
MmioReg default constructor.
MmioReg(MmioFunction function, MmioBehavior behavior, std::string name, std::string desc, uint32_t width, uint32_t index=0, std::optional< uint32_t > addr=std::nullopt, std::optional< uint64_t > init=std::nullopt)
MmioReg constructor.
std::string name
Register mame.
std::unordered_map< std::string, std::string > meta
Metadata.
std::optional< uint32_t > addr
Optional address.